x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel, based on the 8086 microprocessor and its 8-bit-external-bus variant, the 8088. The 8086 was introduced in 1978 as a fully 16-bit extension of Intel's 8-bit 8080 microprocessor, with memory segmentation as a solution for addressing more memory than can be covered by a plain 16-bit address. The term "x86" came into being because the names of several successors to Intel's 8086 processor end in "86", including the 80186, 80286, 80386 and 80486. Colloquially, their names were "186", "286", "386" and "486".
The term is not synonymous with IBM PC compatibility, as this implies a multitude of other computer hardware. Embedded systems and general-purpose computers used x86 chips before the PC-compatible market started, some of them before the IBM PC (1981) debut.
, most desktop and laptop computers sold are based on the x86 architecture family, while mobile categories such as smartphones or tablets are dominated by ARM. At the high end, x86 continues to dominate computation-intensive workstation and cloud computing segments.
Overview In the 1980s and early 1990s, when the 8088 and 80286 were still in common use, the term x86 usually represented any 8086-compatible CPU. Today, however, x86 usually implies binary compatibility with the 32-bit instruction set of the 80386. This is due to the fact that this instruction set has become something of a lowest common denominator for many modern operating systems and also probably because the term became common after the introduction of the 80386 in 1985.
A few years after the introduction of the 8086 and 8088, Intel added some complexity to its naming scheme and terminology as the "iAPX" of the ambitious but ill-fated Intel iAPX 432 processor was tried on the more successful 8086 family of chips, applied as a kind of system-level prefix. An 8086 system, including coprocessors such as 8087 and 8089, and simpler Intel-specific system chips, was thereby described as an iAPX 86 system. There were also terms iRMX (for operating systems), iSBC (for single-board computers), and iSBX (for multimodule boards based on the 8086 architecture), all together under the heading Microsystem 80. However, this naming scheme was quite temporary, lasting for a few years during the early 1980s.
Although the 8086 was primarily developed for embedded systems and small multi-user or single-user computers, largely as a response to the successful 8080-compatible Zilog Z80, the x86 line soon grew in features and processing power. Today, x86 is ubiquitous in both stationary and portable personal computers, and is also used in video game consoles, midrange computers, workstations, servers, and most new supercomputer clusters of the TOP500 list. A large amount of software, including a large list of are using x86-based hardware.
Modern x86 is relatively uncommon in embedded systems, however; small low power applications (using tiny batteries), and low-cost microprocessor markets, such as home appliances and toys, lack significant x86 presence. Simple 8- and 16-bit based architectures are common here, as well as simpler RISC architectures like ARM and RISC-V, although the x86-compatible VIA C7, VIA Nano, AMD's Geode, Athlon Neo and Intel Atom are examples of 32- and 64-bit designs used in some relatively low-power and low-cost segments.
There have been several attempts, including by Intel, to end the market dominance of the "inelegant" x86 architecture designed directly from the first simple 8-bit microprocessors. Examples of this are the iAPX 432 (a project originally named the Intel 8800), the Intel 960, Intel 860 and the Intel/Hewlett-Packard Itanium architecture. However, the continuous refinement of x86 microarchitectures, circuitry and semiconductor manufacturing would make it hard to replace x86 in many segments. AMD's 64-bit extension of x86 (which Intel eventually responded to with a compatible design) and the scalability of x86 chips in the form of modern multi-core CPUs, make x86 an example of how continuous refinement of established industry standards can resist the competition from completely new architectures.
For some advanced features, x86 may require a license from Intel, though some do not need it; x86-64 may require an additional license from AMD.
Chronology
The table below lists processor models and model series implementing various architectures in the x86 family, in chronological order. Each line item is characterized by significantly improved or commercially successful processor microarchitecture designs.
+Chronology of x86 processorsEraIntroductionProminent CPU modelsAddress spaceNotable features Linear Virtual Physicalx86-16 1st 1978 Intel 8086, Intel 8088 (1979) 16-bit NA 20-bit 16-bit ISA, IBM PC (8088), IBM PC/XT (8088)1982 Intel 80186, Intel 80188NEC V20/V30 (1983) 8086-2 ISA, embedded (80186/80188) 2nd Intel 80286 and clones 30-bit 24-bit protected mode, IBM PC/XT 286, IBM PC/ATIA-32 3rd 1985 Intel 80386, AMD Am386 (1991) 32-bit 46-bit 32-bit 32-bit ISA, paging, IBM PS/2 4th (pipelining, cache) 1989 Intel 80486Cyrix Cx486S, DLC (1992)AMD Am486 (1993), Am5x86 (1995) pipelining, on-die x87 FPU (486DX), on-die cache5th(Superscalar) 1993 Intel Pentium, Pentium MMX (1996) Superscalar, 64-bit databus, faster FPU, MMX (Pentium MMX), APIC, SMP 1994 NexGen Nx586AMD 5k86/K5 (1996) Discrete microarchitecture (μ-op translation) 1995 Cyrix Cx5x86Cyrix 6x86/MX (1997)/MII (1998) dynamic execution6th(PAE, μ-op translation) 1995 Intel Pentium Pro 36-bit (PAE) μ-op translation, conditional move instructions, dynamic execution, speculative execution, 3-way x86 superscalar, superscalar FPU, PAE, on-chip L2 cache 1997 Intel Pentium II, Pentium III (1999)Celeron (1998), Xeon (1998) on-package (Pentium II) or on-die (Celeron) L2 Cache, SSE (Pentium III), Slot 1, Socket 370 or Slot 2 (Xeon) 1997 AMD K6/K6-2 (1998)/K6-III (1999)32-bit 3DNow!, 3-level cache system (K6-III)Enhanced Platform 1999 AMD AthlonAthlon XP/MP (2001)Duron (2000)Sempron (2004) 36-bit MMX+, 3DNow!+, double-pumped bus, Slot A or Socket A2000 Transmeta Crusoe 32-bit CMS powered x86 platform processor, VLIW-128 core, on-die memory controller, on-die PCI bridge logicIntel Pentium 4 36-bit SSE2, HTT (Northwood), NetBurst, quad-pumped bus, Trace Cache, Socket 4782003 Intel Pentium MIntel Core (2006)Pentium Dual-Core (2007) μ-op fusion, XD bit (Dothan) (Intel Core "Yonah") Transmeta Efficeon CMS 6.0.4, VLIW-256, NX bit, HTIA-6464-bit Transition1999–2005 2001 Intel Itanium (2001–2017) 64-bit EPIC architecture, 128-bit VLIW instruction bundle, on-die hardware IA-32 H/W enabling x86 OSes & x86 applications (early generations), software IA-32 EL enabling x86 applications (Itanium 2), Itanium register files are remapped to x86 registers x86-64 64-bit Extendedsince 2001 x86-64 is the 64-bit extended architecture of x86, its Legacy Mode preserves the entire and unaltered x86 architecture. The native architecture of x86-64 processors: residing in the 64-bit Mode, lacks of access mode in segmentation, presenting 64-bit architectural-permit linear address space; an adapted IA-32 architecture residing in the Compatibility Mode alongside 64-bit Mode is provided to support most x86 applications 2003 Athlon 64/FX/X2 (2005), OpteronSempron (2004)/X2 (2008)Turion 64 (2005)/X2 (2006) AMD64 (except some Sempron processors presented as purely x86 processors), on-die memory controller, HyperTransport, on-die dual-core (X2), AMD-V (Athlon 64 Orleans), Socket 754/939/940 or AM2 2004 Pentium 4 (Prescott)Celeron D, Pentium D (2005) EM64T (enabled on selected models of Pentium 4 and Celeron D), SSE3, 2nd gen. NetBurst pipelining, dual-core (on-die: Pentium D 8xx, on-chip: Pentium D 9xx), Intel VT (Pentium 4 6x2), socket LGA 775 2006 Intel Core 2Pentium Dual-Core (2007)Celeron Dual-Core (2008) Intel 64 (<<== EM64T), SSSE3 (65 nm), wide dynamic execution, μ-op fusion, macro-op fusion in 16-bit and 32-bit mode, on-chip quad-core(Core 2 Quad), Smart Shared L2 Cache (Intel Core 2 "Merom") 2007 AMD Phenom/II (2008)Athlon II (2009)Turion II (2009) Monolithic quad-core (X4)/triple-core (X3), SSE4a, Rapid Virtualization Indexing (RVI), HyperTransport 3, AM2+ or AM32008 Intel Core 2 (45 nm) SSE4.1 Intel Atom netbook or low power smart device processor, P54C core reused Intel Core i7Core i5 (2009)Core i3 (2010) QuickPath, on-chip GMCH (Clarkdale), SSE4.2, Extended Page Tables (EPT) for virtualization, macro-op fusion in 64-bit mode, (Intel Xeon "Bloomfield" with Nehalem microarchitecture) VIA Nano hardware-based encryption; adaptive power management 2010 AMD FX octa-core, CMT(Clustered Multi-Thread), FMA, OpenCL, AM3+2011 AMD APU A and E Series (Llano) on-die GPGPU, PCI Express 2.0, Socket FM1 AMD APU C, E and Z Series (Bobcat) low power smart device APU Intel Core i3, Core i5 and Core i7(Sandy Bridge/Ivy Bridge) Internal Ring connection, decoded μ-op cache, LGA 1155 socket2012 AMD APU A Series (Bulldozer, Trinity and later) AVX, Bulldozer-based APU, Socket FM2 or Socket FM2+ Intel Xeon Phi (Knights Corner) PCI-E add-on card coprocessor for XEON based system, Manycore Chip, In-order P54C, very wide VPU (512-bit SSE), LRBni instructions (8× 64-bit)2013 AMD Jaguar(Athlon, Sempron) SoC, game console and low power smart device processor Intel Silvermont(Atom, Celeron, Pentium) SoC, low/ultra-low power smart device processorIntel Core i3, Core i5 and Core i7 (Haswell/Broadwell) AVX2, FMA3, TSX, BMI1, and BMI2 instructions, LGA 1150 socket 2015 Intel Broadwell-U(Intel Core i3, Core i5, Core i7, Core M, Pentium, Celeron) SoC, on-chip Broadwell-U PCH-LP (Multi-chip module) 2015–2020 Intel Skylake/Kaby Lake/Cannon Lake/Coffee Lake/Rocket Lake(Intel Pentium/Celeron Gold, Core i3, Core i5, Core i7, Core i9) AVX-512 (restricted to Cannon Lake-U and workstation/server variants of Skylake) 2016 Intel Xeon Phi (Knights Landing) Manycore CPU and coprocessor for Xeon systems, Airmont (Atom) based core 2016 AMD Bristol Ridge(AMD (Pro) A6/A8/A10/A12) Integrated FCH on die, SoC, AM4 socket 2017 AMD Ryzen Series/AMD Epyc Series AMD's implementation of SMT, on-chip multiple dies 2017 Zhaoxin WuDaoKou (KX-5000, KH-20000) Zhaoxin's first brand new x86-64 architecture 2018–2021 Intel Sunny Cove (Ice Lake-U and Y), Cypress Cove (Rocket Lake) Intel's first implementation of AVX-512 for the consumer segment. Addition of Vector Neural Network Instructions (VNNI) 2019 AMD Matisse Multiple Chip Module design with I/O die separate from CPU die(s), Support for PCIe Gen4 2020 Intel Willow Cove (Tiger Lake-Y/U/H) Dual ring interconnect architecture, updated Gaussian Neural Accelerator (GNA2), new AVX-512 Vector Intersection Instructions, addition of Control-Flow Enforcement Technology (CET) 2021 Intel Alder Lake Hybrid design with performance (Golden Cove) and efficiency cores (Gracemont), support for PCIe Gen5 and DDR5, updated Gaussian Neural Accelerator (GNA3). AVX-512 not officially supported 2022 AMD Vermeer (5800X3D) X3D chips have an additional 64MB 3D vertically stacked L3 cache (3D V-Cache) for up to 96MB L3 Cache 2022 AMD Raphael AMD's first implementation of AVX-512 for the consumer segment, iGPU now standard on Ryzen CPU's with 2 RDNA 2 compute cores
History Designers and manufacturers
At various times, companies such as IBM, VIA, NEC, AMD, TI, STM, Fujitsu, OKI, Siemens, Cyrix, Intersil, C&T, NexGen, UMC, and DM&P started to design or manufacture x86 processors (CPUs) intended for personal computers and embedded systems. Other companies that designed or manufactured x86 or x87 processors include ITT Corporation, National Semiconductor, ULSI System Technology, and Weitek.